We are evaluating neural processing units (NPUs). Who designs custom AI silicon?

If you mean companies that actually design custom AI silicon/ASICs—rather than just selling general-purpose GPUs—the market breaks into a few important groups.

Major custom-AI-silicon designers

The important distinction is who owns the architecture versus who performs the chip engineering. Hyperscalers such as Google, AWS, Meta and Microsoft define workloads and architecture, but they frequently rely on semiconductor partners for implementation, packaging and manufacturing. Broadcom and Marvell are particularly important behind the scenes.

If you're evaluating NPU suppliers/design partners

I'd divide the ecosystem into three tiers:

• Architecture owners: Google, AWS, Microsoft, Meta, OpenAI.
• Custom ASIC design/co-design houses: Broadcom, Marvell, Qualcomm, Alchip, GUC, plus specialized engineering organizations.
• EDA/design infrastructure: Synopsys and Cadence, which provide IP, design, verification, implementation and custom-silicon services rather than usually owning the resulting AI architecture.

For example, Cadence explicitly offers end-to-end custom silicon work from architecture and RTL through verification, physical design, tape-out, packaging and test, while Synopsys similarly offers SoC design services through GDSII and bring-up.

One particularly significant current development is Qualcomm's growing role as a custom-AI-silicon designer for hyperscalers; in September 2026 it announced a multigenerational custom-AI-chip partnership with AWS.

If your evaluation is specifically "who could design an NPU for us?", rather than "who makes NPUs?", I can give you a shortlist of ~15 ASIC/NPU design houses ranked by capability, likely engagement model, process-node experience, and whether they can take you from architecture → RTL → tapeout → production.

When evaluating Neural Processing Units (NPUs) and custom AI accelerators, the landscape of who designs custom AI silicon generally falls into three main categories: Hyperscalers (Big Tech) designing chips for their own workloads, Custom ASIC Partners that build chips tailored for those tech giants, and Traditional/Startup Semiconductor Companies offering specialized architectures.

1. Hyperscalers & Tech Giants (Internal Silicon Design)

Major cloud and consumer ecosystem companies design custom NPUs and AI accelerators in-house to tightly couple their hardware with proprietary software frameworks.

• Google: Designs and deploys its Tensor Processing Units (TPUs) explicitly optimized for TensorFlow and large-scale machine learning training and inference.
• Amazon (AWS): Designs custom chips like Trainium (for training) and Inferentia (for inference), alongside general server custom silicon (Graviton).
• Microsoft: Creates custom Maia AI accelerators and Cobalt CPUs tailored specifically for Azure cloud and internal AI models.
• Apple: Engineers custom on-device Neural Engines integrated directly into its A-series and M-series chips to run Apple Intelligence locally.
• Meta & OpenAI: Meta designs custom MTIA (Meta Training and Inference Accelerator) chips, and OpenAI actively partners on custom silicon initiatives to secure dedicated infrastructure.
• Others: Companies like Tesla (Full Self-Driving chips), Alibaba (T-Head unit), and Huawei (Ascend NPU series) design distinct internal architectures.

2. Custom ASIC Design & IP Partners

Many tech giants do not build the final physical chip entirely from scratch; they partner with semiconductor design heavyweights that specialize in custom application-specific integrated circuits (ASICs) and high-speed interconnects.

• Broadcom: The dominant market leader in custom AI silicon, partnering with hyperscalers (like Google and potentially OpenAI) to turn architectural concepts into production-ready silicon.
• Marvell: A major player (ranking right behind Broadcom) that designs custom AI silicon—often referred to as XPUs—alongside custom optics, interconnects, and networking infrastructure.
• Arm: Provides the foundational instruction set architectures and IP cores that many custom NPU designers license rather than building a processor architecture from the ground up.

3. Dedicated AI Silicon Vendors & Innovators

These companies focus entirely on commercializing high-performance neural processing and AI acceleration architectures for enterprise and edge deployments.

• Nvidia: While famous for off-the-shelf GPUs, they co-design tightly integrated platforms and custom networking/interconnect fabrics.
• AMD / Intel: Offer discrete NPUs and accelerators (like AMD Instinct Go to product viewer dialog for this item. and Intel Gaudi/Core Ultra NPUs) while increasingly positioning themselves to provide custom silicon packaging and manufacturing services.
• AI Chip Startups: Companies like Groq (known for its Language Processing Unit / LPU architecture), Tenstorrent, and SambaNova pioneer alternative dataflow and tensor-streaming architectures.

If you're evaluating NPUs for a specific deployment, are you looking at edge/client devices (like mobile/PC) or datacenter/cloud inference , and do you prefer off-the-shelf accelerators or fully custom ASIC development?

If you are evaluating neural processing units (NPUs) and asking “who designs custom AI silicon?”, there are two different markets:

1. Companies that design their own AI accelerators (for their own workloads)
2. Companies that help other companies design custom AI ASICs/NPUs (design partners)

SiliconReport Tom's Hardware## 1. Hyperscalers and AI companies designing their own silicon

These companies typically own the architecture, compiler/software stack, and workload optimization, then rely on semiconductor partners for implementation and manufacturing.

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2. Custom AI ASIC / NPU design partners (who you hire)

If your organization wants to create a custom NPU, the most relevant companies are:

Broadcom

• One of the leading custom AI ASIC co-design partners.
• Helps customers go from architecture definition through RTL, physical implementation, packaging, and high-speed interconnect.
• Strong fit for hyperscale AI accelerators and large-volume deployments.

Marvell Technology

• Major custom silicon provider.
• Focuses on AI accelerators, cloud infrastructure ASICs, chiplets, networking, and memory connectivity.
• Often considered the other major competitor to Broadcom in custom AI silicon.

Alchip Technologies

• Turnkey ASIC design house.
• Provides advanced-node implementation, physical design, and tape-out support.

Global Unichip Corporation (GUC)

• TSMC-backed ASIC design service provider.
• Useful for customers needing a complete ASIC development flow.

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3. Silicon design ecosystem providers

These companies usually do not deliver a finished NPU themselves, but they provide critical IP, tools, and infrastructure:

• Arm — CPU/IP platforms such as Neoverse and custom compute ecosystems.
• Synopsys — EDA tools, verification, semiconductor IP.
• Cadence Design Systems — EDA tools, IP, and custom silicon services.

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4. Specialized AI accelerator companies

These are not usually “custom NPU design houses,” but they build their own architectures:

• NVIDIA — GPUs and AI accelerators (merchant silicon rather than customer-specific ASICs).
• AMD — Instinct accelerators and adaptive compute platforms.
• Cerebras Systems — wafer-scale AI processors.
• Groq — inference-focused LPU architecture.
• d-Matrix — inference accelerators optimized for generative AI serving.

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Practical shortlist for an NPU evaluation

If you are looking for a partner to build a custom AI chip, I would start with:

1. Broadcom — hyperscale-grade custom AI ASICs
2. Marvell — custom AI silicon + infrastructure integration
3. Alchip / GUC — ASIC development services
4. Arm + Synopsys + Cadence ecosystem — architecture/IP/tooling support

If you are benchmarking buy vs. build, compare against:

• NVIDIA GPUs (CUDA ecosystem)
• Google TPU
• AWS Trainium/Inferentia
• AMD Instinct
• Cerebras/Groq-style specialized architectures

The key evaluation criteria are usually not just TOPS/FLOPS, but compiler maturity, memory architecture (HBM vs SRAM), interconnect, workload mapping, software ecosystem, and expected production volume.

The custom AI silicon and NPU landscape spans hyper-scalers building in-house chips, fabless semiconductor giants providing custom ASIC/XPU development, and specialized IP vendors.

1. Hyperscalers & Frontier Labs (In-House Silicon)

These organizations design proprietary accelerators to optimize internal workloads, reduce dependency on merchant silicon, and control total cost of ownership.

• Google : A pioneer in custom AI accelerators with its Tensor Processing Unit (TPU) architecture, optimized for both large-scale training and low-latency inference.
• Amazon Web Services (AWS) : Designs specialized custom silicon like Trainium (for high-performance model training) and Inferentia (for cost-effective inference).
• Meta : Develops custom infrastructure accelerators (such as the Meta Training and Inference Accelerator, MTIA) tailored specifically to ranking, recommendation, and generative AI models.
• Microsoft : Builds custom silicon including the Maia AI accelerator and Cobalt CPU to power its internal Azure cloud workloads and Copilot infrastructure.
• OpenAI : Partners with industry leaders like Broadcom on custom proprietary silicon initiatives aimed at optimizing frontier-model inference.
• Alibaba & Huawei : In global markets, Alibaba (via T-Head) and Huawei (with the Ascend NPU series) design substantial custom processing units for local cloud ecosystems.

2. Custom ASIC & XPU Design Partners (Foundry/Silicon Enablers)

Many organizations do not fab their own chips from scratch; instead, they leverage specialized semiconductor design houses to build custom application-specific integrated circuits (ASICs):

• Broadcom : Dominates the custom AI accelerator market, partnering closely with hyperscalers and frontier AI labs to co-design massive proprietary silicon solutions.
• Marvell : Designs custom AI silicon (branded as XPUs ) alongside custom optics, networking, and interconnect fabrics for major cloud operators.
• MediaTek & Qualcomm : Power edge-AI and client-device NPUs (like Qualcomm's Hexagon NPU and MediaTek's APU lines) embedded into mobile, automotive, and PC platforms.

3. Merchant Silicon & NPU IP Providers

If you are evaluating off-the-shelf or licensable NPU architectures rather than building a ground-up custom mask:

• NVIDIA : Sets the benchmark for high-end parallel processing and dedicated transformer engine architectures, though largely via merchant GPUs rather than custom foundry ASICs.
• AMD : Provides versatile enterprise NPUs and accelerators (the Instinct and Ryzen AI lines) scaling from edge devices to data centers.
• Arm : Licenses foundational NPU and CPU IP (such as the Arm Ethos NPU family) that third-party silicon designers integrate into their own systems-on-chip (SoCs).

Are you looking to license NPU IP to build your own chip, evaluate custom ASIC partners like Broadcom/Marvell, or compare cloud-based custom silicon (like Google TPUs or AWS Trainium)? Let me know how you're approaching your evaluation.

The custom AI silicon and NPU (Neural Processing Unit) landscape spans multiple tiers, from hyperscale cloud providers building internal accelerators to traditional silicon vendors and specialized IP creators.

1. Hyperscalers (In-House Custom Silicon)

Major cloud and consumer tech giants bypass merchant silicon to optimize power, cost, and architecture for their specific proprietary models:

• Google: Develops and deploys custom Tensor Processing Units (TPUs) for massive training and high-efficiency inference workloads.
• Amazon Web Services (AWS): Designs custom chips tailored for specific pipeline stages, notably Trainium (for model training) and Inferentia (for high-throughput inference).
• Microsoft: Builds custom accelerators like the Microsoft Maia Go to product viewer dialog for this item. AI accelerator series to anchor internal Azure workloads.
• Meta: Designs and implements custom MTIA (Meta Training and Inference Accelerator) chips to power internal recommendation and generative AI infrastructure.
• Apple: Integrates custom Neural Engine cores directly into all A-series, M-series, and S-series SoCs for ultra-low-power edge AI processing.
• Tesla: Vertically integrates proprietary FSD/Dojo neural processors optimized strictly for real-time computer vision and autonomous vehicle inference.

2. Custom Silicon ASIC & IP Partners (Fabless Enablers)

Many tech companies and hyperscalers don't fab chips entirely from scratch; they partner with specialized design firms that turn architecture concepts into physical custom ASICs (Application-Specific Integrated Circuits) and integrate ecosystems like the NVIDIA NVLink Fusion Ecosystem:

• Broadcom & Marvell: Market leaders in co-designing custom AI accelerators (XPUs/ASICs) directly alongside major cloud providers.
• MediaTek & Qualcomm: Design powerful mobile and client-side NPUs (such as Qualcomm's Hexagon NPU lines) and collaborate on semi-custom high-performance infrastructure.
• Alchip Technologies & Faraday: Leading ASIC design service providers that customize backend physical implementations for AI accelerators.

3. Dedicated AI Chip Startups

Firms dedicated entirely to architectural innovation in neural processing and alternative dataflow paradigms:

• Tenstorrent: Building RISC-V-based AI and high-performance computing processors.
• Groq: Pioneers of LPU (Language Processing Unit) deterministic architecture optimized for ultra-fast LLM inference.
• Cerebras Systems: Known for massive wafer-scale engines built specifically for high-speed AI training and inference.

If you share what workload type (e.g., edge inference, large-scale LLM training, or cloud deployment) and performance metrics (like tokens-per-second or power envelope) you are benchmarking, I can help narrow down which architectural approach fits your evaluation best.

If by “who designs custom AI silicon?” you mean companies that can architect/co-design an NPU or AI ASIC for a customer, the market breaks into a few groups:

Major custom-AI silicon designers

• Broadcom — probably the most important merchant custom-AI ASIC partner today. It co-develops accelerators for hyperscalers and AI companies, including Google, Meta and OpenAI. Broadcom says custom chips are now a major portion of its AI-semiconductor business.
• Marvell Technology — another major custom silicon/co-design provider, particularly for hyperscaler AI accelerators and networking.
• Synopsys — provides actual SoC design services, from architecture/microarchitecture through verification and implementation/GDSII, in addition to EDA/IP.
• Cadence Design Systems — similarly offers customer silicon design services, including implementation, verification and AI accelerator IP such as its Neo NPU.
• Arm — supplies CPU/compute IP and increasingly complete compute subsystems rather than typically being the sole custom-chip designer. Its ecosystem lets customers build differentiated AI SoCs around Arm technology.

Hyperscalers designing their own

The biggest customers increasingly have internal silicon teams:

• Google — TPU
• Amazon/AWS — Trainium and Inferentia, with Annapurna Labs as a major internal design organization
• Microsoft — Maia
• Meta — MTIA
• OpenAI — custom accelerator program, including its 2026 Broadcom collaboration
• Apple — Neural Engine and increasingly customized AI compute across its SoCs

Virtually every major hyperscaler is now pursuing some form of custom AI silicon.

If you're evaluating NPU vendors specifically

I'd divide the landscape this way:

A particularly important distinction for your evaluation is “NPU IP vendor” vs. “custom silicon design house.” If you're looking to have your company’s own NPU designed and taped out, Broadcom/Marvell/Synopsys/Cadence are much more relevant than simply buying an NPU IP block.

If you tell me whether you're evaluating an NPU for edge/mobile, automotive, PC, or datacenter, I can give you a much more targeted competitive landscape—including who actually has licensable NPU IP, who will do a turnkey ASIC, estimated economics, and likely TSMC nodes.

If by “who designs custom AI silicon?” you mean companies that can either architect an NPU/AI ASIC for you or are already doing custom accelerators for hyperscalers, I’d divide the landscape into three groups:

1. Major custom-AI silicon designers

• Broadcom — probably the most important commercial custom-AI ASIC partner. It co-designs large AI accelerators with hyperscalers, covering architecture, implementation, networking and advanced packaging.
• Marvell Technology — major custom-silicon/ASIC partner, particularly in data-center AI and networking.
• Alchip — turnkey ASIC design house covering SoC architecture, RTL/front-end, physical design, verification, packaging and manufacturing coordination.
• Global Unichip (GUC) — advanced ASIC design partner offering architecture/spec-in, SoC integration, physical implementation, HBM/die-to-die IP and manufacturing.
• Socionext — custom-SoC company that works from system architecture through design and production; explicitly supports integrating customer-specific AI accelerators.

2. Companies designing their own AI silicon

These aren't primarily ASIC design-service companies; they're customers/owners of custom silicon programs:

The important distinction is that these companies generally own the architecture, workload/software optimization and product requirements, while firms such as Broadcom, Marvell, GUC or Alchip can provide substantial silicon engineering and implementation.

3. Specialist AI-chip companies

If you're evaluating an NPU architecture rather than looking for an outsourced ASIC house, also look at Cerebras, Tenstorrent, Groq and SambaNova. Their approaches are more differentiated from conventional GPU/NPU designs and can be useful architectural benchmarks.

For an NPU evaluation, my practical shortlist would be: Broadcom, Marvell, GUC, Alchip and Socionext if you want someone to help design your custom chip; Google, AWS, Microsoft and Meta if you're benchmarking what state-of-the-art hyperscaler NPUs look like.

If you tell me whether you're evaluating on-device/mobile NPUs, automotive NPUs, edge AI, or data-center inference/training, I can narrow this to the 10–15 most relevant silicon design firms and compare their capabilities, process nodes, HBM/chiplet experience, estimated engagement model, and typical customers.

The custom AI silicon and NPU landscape is split between hyperscale cloud providers (who design chips in-house for their specific data center workloads), consumer tech giants (for on-device edge NPUs), and semiconductor design partners (who engineer custom ASICs for clients).

1. Hyperscalers (Cloud & Data Center Custom Silicon)

• Google: Pioneer in custom AI accelerators with its Tensor Processing Unit (TPU) line (such as newer versions like TPU v7 "Ironwood"), designed in collaboration with partners like Broadcom.
• Amazon (AWS): Designs specialized training and inference chips, including Trainium and Inferentia , optimized tightly for AWS infrastructure and the Neuron SDK.
• Microsoft: Develops custom cloud accelerators like the Maia series to power internal workloads and Azure AI infrastructure.
• Meta: Designs and deploys the Meta Training and Inference Accelerator (MTIA) family to scale its internal ad-ranking and generative AI infrastructure.
• OpenAI: Expanding past pure software development, reports indicate they are actively partnering to build out custom in-house accelerators (codenamed projects like Jalapeño ) to secure massive infrastructure capacity.

2. Custom Silicon Design & ASIC Partners

• Broadcom: The dominant merchant silicon partner for major tech giants, co-designing custom AI accelerators and ASICs for Google (TPUs) and expanding partnerships with Meta and OpenAI.
• Marvell: Competes closely in the custom AI ASIC market, designing tailor-made "XPUs" and high-speed networking/optics interconnects for hyperscale cloud operators.

3. Edge & Client Device NPU Designers

• Apple: Designs advanced custom Apple Silicon (M-series and A-series chips) featuring tightly integrated, high-performance on-device Neural Engines designed for local large language models and privacy-first machine learning.
• Qualcomm & MediaTek: Lead the mobile and PC ecosystem by embedding powerful dedicated Hexagon/APU NPUs into Snapdragon and Dimensity platforms for on-device AI.
• AMD & Intel: Longtime traditional processor giants embedding dedicated XPU/NPU tiles into their client PC and server architectures (e.g., Intel Core Ultra NPUs, AMD Ryzen AI).

If you are evaluating NPUs for a specific deployment, are you looking at edge/client devices or data center/cloud-scale inference and training ? Let me know, and I can narrow down the performance metrics or ecosystem maturity you should compare.

The custom AI silicon and NPU (Neural Processing Unit) market is split into two primary groups: hyperscale tech giants designing chips internally for their own infrastructure, and semiconductor ASIC/IP vendors that design custom silicon collaboratively for others.

1. Hyperscalers & Cloud Providers (Internal Silicon)

These companies build proprietary application-specific integrated circuits (ASICs) and NPUs to optimize workloads for their specific cloud services and large language models:

• Google: Pioneer in custom accelerators with their Tensor Processing Unit (TPU ) lineup, optimized heavily for TensorFlow/Jax workloads and massive-scale training and inference.
• Amazon Web Services (AWS): Designs Trainium (for model training) and Inferentia (for high-efficiency inference) backed by the AWS Neuron SDK.
• Microsoft: Developed the Maia AI accelerator series tailored for Azure data centers and powering internal models like OpenAI integrations.
• Meta: Designs the MTIA (Meta Training and Inference Accelerator) family to handle internal recommendation and generative AI workloads.
• OpenAI: Expanded into vertical integration with custom inference silicon like Jalapeño.

2. Consumer Device & Edge AI Leaders

• Apple: Integrates custom Apple Silicon featuring powerful on-device Neural Engines (across M-series and A-series chips) for local, privacy-centric machine learning.
• Qualcomm & MediaTek: Dominate mobile and edge NPU design (Hexagon NPUs and MediaTek APUs), licensing or embedding high-efficiency AI engines into billions of smartphones and IoT devices.

3. Custom ASIC Partners & Semiconductor Designers

Companies that don't just build their own chips, but act as the foundational design engine and merchant silicon partners for hyperscalers and enterprises:

• Broadcom: Market leader in custom AI ASIC development, partnering closely with hyperscalers and innovators (such as co-developing custom inference chips like OpenAI's Jalapeño).
• Marvell: Designs custom AI silicon (often referred to as XPUs) and accelerated infrastructure for major cloud providers, ranking as a top custom ASIC partner alongside high-speed networking and optics.
• NVIDIA: While primarily known for off-the-shelf merchant GPUs, NVIDIA increasingly collaborates on custom architectures, bridging proprietary ecosystems (like NVLink) with custom enterprise deployments.

If you are evaluating these for a specific project, let me know:

• Are you looking at edge/client devices or cloud/datacenter scale?
• What are your primary targets for training vs. inference?

I can help you narrow down the architecture choices.

If you are evaluating neural processing units (NPUs) or custom AI silicon, the market splits into three groups:

1. Companies that design their own AI accelerators
2. Companies that help others design custom AI ASICs
3. Companies that sell off-the-shelf AI accelerators

The most relevant names depend on whether you want to buy, license, or commission a custom chip.

1. Custom AI silicon designers (end users with their own architectures)

These companies typically design the architecture, software stack, and workload optimization internally, then work with external semiconductor partners for implementation and manufacturing.

2. Custom AI ASIC design partners (the companies you hire)

If the question is “Who can help us build our own NPU?”, the shortlist is different:

Broadcom and Marvell are particularly important because many companies that “design their own chip” still rely on outside ASIC specialists to turn architecture into manufacturable silicon.

3. Merchant AI accelerator vendors (buy instead of build)

If you are evaluating existing NPUs/AI accelerators:

For an NPU evaluation, I would usually create a shortlist like this:

If you want a custom chip designed for your models

• Broadcom
• Marvell Technology
• Arm Holdings ecosystem partners
• Internal silicon team + TSMC/foundry ecosystem

If you want a reference architecture

• Google TPU
• AWS Trainium/Inferentia
• Microsoft Maia
• Meta MTIA
• Apple Neural Engine

If you want to avoid a multi-year ASIC program

• NVIDIA
• AMD
• Intel
• Qualcomm
• Cerebras
• Groq

A practical custom NPU program usually requires:

• architecture team
• compiler/runtime stack
• RTL design
• verification
• physical design
• HBM/memory subsystem expertise
• advanced packaging
• foundry access (often TSMC)

The silicon itself is only part of the product; the compiler and software stack are often what determine whether an NPU succeeds.

If you are evaluating vendors for an enterprise NPU project, the key distinction is whether you need a full custom ASIC, a semi-custom accelerator, or an NPU IP block to integrate into an SoC.